1. Field of the Invention
The present invention relates to semiconductor memories. More particularly, the present invention relates to an improved sense amplifier circuit for decreasing memory access time.
2. Description of the Prior Art
Semiconductor devices are becoming increasingly sophisticated. One aspect of this sophistication is the increasing number of memory cells on a single chip. Additionally, increased speed has become an important requirement of a high performance memory system. Hence, as the number of semiconductor memory cells increase, reduced memory access time also becomes important.
A main factor in total memory access time is the sensing delay time, i.e., the time it takes to sense information in the cells of the semiconductor memory. A reduction in sensing delay time, therefore, is highly desirable. One known means of reducing sensing delay time is to use positive feedback within the sense amplifier.
A prior art circuit for reducing sensing delay time in a semiconductor memory by means of positive feedback is described in a paper entitled "A Fast 7.5ns Access 1K-Bit RAM for Cache-Memory Systems," IEEE Journal of Solid-State Circuits, p. 656 Vol. SC-13, No. 5, October 1978. In this reference, positive feedback for a sense amplifier is provided by a DC cross-coupling between two sense amplifier transistors.